Model checking

In computer science, model checking, or property checking, is, for a given finite-state model of a system, exhaustively and automatically checking whether this model meets a given specification (a.k.a. correctness properties). Typically, one has hardware or software systems in mind, whereas the specification contains safety requirements such as the absence of deadlocks and similar critical states that can cause the system to crash, as well as liveness requirements. In computer science, model checking, or property checking, is, for a given finite-state model of a system, exhaustively and automatically checking whether this model meets a given specification (a.k.a. correctness properties). Typically, one has hardware or software systems in mind, whereas the specification contains safety requirements such as the absence of deadlocks and similar critical states that can cause the system to crash, as well as liveness requirements. In order to solve such a problem algorithmically, both the model of the system and the specification are formulated in some precise mathematical language. To this end, the problem is formulated as a task in logic, namely to check whether a given structure satisfies a given logical formula. This general concept applies to many kinds of logic and suitable structures. A simple model checking problem is verifying whether a given formula in the propositional logic is satisfied by a given structure. Property checking is used for verification instead of equivalence checking when two descriptions are not functionally equivalent. Particularly, during refinement, the specification is complemented with the details that are unnecessary in the higher level specification. Yet, there is no need to verify the newly introduced properties against the original specification as it is not even possible. Therefore, the strict bi-directional equivalence check is relaxed to a one-way property checking. The implementation or design is regarded as a model of the circuit whereas the specifications are properties that the model must satisfy. An important class of model checking methods have been developed for checking models of hardware and software designswhere the specification is given by a temporal logic formula.Pioneering work in temporal logic specification was done by Amir Pnueli, who received the 1996 Turing award for 'seminal work introducing temporal logic into computing science'. Model checking began with the pioneering work by E. M. Clarke and E. A. Emerson and by J. P. Queille and J. Sifakis. Clarke, Emerson, and Sifakis shared the 2007 Turing Award for their seminal work founding anddeveloping the field of model checking. Model checking is most often applied to hardware designs. For software, because of undecidability (see computability theory) the approach cannot be fully algorithmic; typically it may fail to prove or disprove a given property. In embedded systems hardware designs it is possible to validate (verify against some specified requirements) a specification delivered i.e. by means of UML activity diagrams or control interpreted Petri nets. The structure is usually given as a source code description in an industrial hardware description language or a special-purpose language. Such a program corresponds to a finite state machine (FSM), i.e., a directed graph consisting of nodes (or vertices) and edges. A set of atomic propositions is associated with each node, typically stating which memory elements are one. The nodes represent states of a system, the edges represent possible transitions which may alter the state, while the atomic propositions represent the basic properties that hold at a point of execution. Formally, the problem can be stated as follows: given a desired property, expressed as a temporal logic formula p, and a structure M with initial state s, decide if M , s ⊨ p {displaystyle M,smodels p} . If M is finite, as it is in hardware, model checking reduces to a graph search. state space enumeration, symbolic state space enumeration, abstract interpretation, symbolic simulation, symbolic trajectory evaluation, symbolic execution Instead of enumerating reachable states one at a time, the state space can sometimes be traversed more efficiently by considering large numbers of states at a single step. When such state space traversal is based on representations of set of states and transition relations as logical formulas, binary decision diagrams (BDD) or other related data structures, the model-checking method is symbolic.