Heat Transport and Temperature Gradient in Silicon-on-Insulator Wafer during Flash Lamp Annealing Process

The temperature gradient formed in a silicon-on-insulator (SOI) wafer during a flash lamp annealing process is calculated on the basis of the heat transport theory. The temperature of SOI wafer, having a 0.04-µm-thick active layer and a 0.1-µm-thick buried oxide (BOX) layer, is calculated. Within 1000 µs, the active layer surface reaches the maximum temperature higher than 1473 K. Because most of the heat is transported by conduction, a very large temperature gradient, such as 3×107 K/m, is formed in the BOX layer owing to its very small heat conductivity. The radiant heat flux through the BOX layer is estimated to be significantly smaller than the conduction heat flux. From a series of calculations taking into account various thicknesses of the active layer and the BOX layer, a BOX layer thicker than 1 µm can significantly increase the active layer temperature.