Exploring MOL design options for a 20nm CMOS technology using TCAD
2011
A mixed-mode simulation framework is presented to study the AC performance of a 20nm bulk CMOS technology with respect to various options for contact design at the middle-of-line design level. These simulations combine the predictive capabilities of a calibrated two-dimensional TCAD model for a MOSFET with three-dimensional simulations for the layout dependent parasitic capacitances to extract the characteristic parameters of a multi-stage ring-oscillator circuit, such as the ring delay, and the effective switching capacitance. Significant performance degradation is predicted comparing the simulation results for a conventional contact design versus a typical 20nm design considering raised source-drain and a contact bar.
Keywords:
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
4
References
1
Citations
NaN
KQI