A Study on the Optimum Selection of Interpolation Factor for the Design of Narrow Transition Band FIR Filter Using IBM

Hardware efficient digital systems have drawn significant attention to the researchers throughout the world over the last few years. In order to achieve this objective, this paper presents the design scheme of sharp cut-off FIR filter using an optimal value of interpolation factor, that produces minimum hardware complexity without affecting the filter performance. Simulation results help to achieve the favourable value of interpolation factor from a set of values. Moreover, the designed filter has subsequently been synthesized using Altera’s Cyclone IV FPGA board and the superiority of the design has been established by comparing its hardware cost with the other state-of-the-art design frameworks.