Memory-Centric Flooded LDPC Decoder Architecture Using Non-surjective Finite Alphabet Iterative Decoding

Non-Surjective Finite Alphabet Iterative Decoding (NS-FAID) represents an LDPC decoding algorithm that uses reduced message storage, with similar or improved error correction performance with respect to Min-Sum. In this paper, we employ NS-FAID compression tables for a memory-centric flooded LDPC decoding architecture. Due to the approximate message storage, improved memory footprint and overall cost is obtained using the NS-FAID approach. We present FPGA synthesis results, in terms of LUT-FF pairs used, working frequency and throughput, as well as Throughput to Area Ratio (TAR). The estimates indicate that employing NS-FAID compression tables yield improvements between 25% and 110% in TAR with respect to the baseline Min-Sum decoder.