A fast, low-energy multi-state phase-change artificial synapse based on uniform partial-state transitions

Complementary metal–oxide–semiconductor (CMOS)-based neural architectures and memristive devices containing many artificial synapses are promising technologies that are being developed for pattern recognition and machine learning. However, the volatility and design complexity of traditional CMOS architectures, and the trade-off between the operating time and power consumption of conventional memristive devices, have tended to impede the path to achieve the interconnectivity/compactness and information density of the brain using either approach. Here, by developing a nanoscale deposit-only-metal-electrode-fabrication-based uniform-partial-state-transition-facilitated approach, we demonstrate a fast artificial synapse with a Rapid-operating-time, Intermediate-bias-range, Multiple-states, and Several-synaptic-functions (RIMS) synapse, implemented using deposit-only, nanopillar-based Ge2Sb2Te5-type memristive devices. A previously unconsidered, fast, paired-pulse facilitation/depression using ∼50 ns spikes with an ∼1 µs inter-spike interval within an ∼1 V range and with a low-energy consumption of ∼1.8 pJ per paired-spike as well as a previously inaccessible multi-state, rapid long-term potentiation/depression with ∼15 distinct states using ∼50 ns spikes within a 0.7/1.4 V range was achieved. Fast spike-timing-dependent plasticity using ∼50 ns spikes with an ∼1 µs inter-spike interval within a 1.3 V range was also achieved. Electro-thermal simulations reveal a uniform-partial-state-transition-facilitated variation in conductance states. This artificial synapse, equipped with a nanoscale deposit-only-metal-electrode-fabrication-based uniform-partial-state-transition-facilitated framework, shows the potential for a substantial overall performance improvement in artificial-intelligence tasks.