Low-temperature annealing behavior of iron-related deep levels in n-type silicon wafers

The iron-related deep levels in n-type silicon and their thermal stabilities were investigated by deep-level transient spectroscopy (DLTS). Three deep energy levels at Ec − 0.35, Ec − 0.41, and Ec − 0.48 eV were observed and classified into two types from the annealing behavior at room temperature and a low temperature of 200 °C. We found for the first time that only one iron-related deep level at Ec − 0.35 eV was highly stable at room temperature and 200 °C, while other iron-related deep levels were unstable. We also found that the concentration of the deep energy level at Ec − 0.41 eV gradually decreased at room temperature. These results suggest that the origin of the thermally stable level at Ec − 0.35 eV is attributed to the substitutional iron-related level, and those of the thermally unstable levels at Ec − 0.41 and Ec − 0.48 eV are attributed to interstitial iron-related complexes such as iron-acceptor pairs in p-type silicon.