High-Performance Concatenation Decoding of Reed–Solomon Codes With SPC Codes

A novel single parity check-multiplicity assignment decoding algorithm based on voltage magnitude (VM_SPC-MA) is proposed, which is applied to the concatenated scheme of single parity check (SPC) inner code and Reed–Solomon (RS) outer code, following the Consultative Committee for Space Data Systems (CCSDS) standard. The algorithm determines whether the SPC code is in error by SPC, then obtains the reliability information of the inner code bits for error correction based on the characteristics of the received bit-level voltage, and decodes the outer code based on the reliability information of the inner codewords and the channel information. The decoding performance is greatly improved by connecting the inner and outer codes through the multiplicity assignment (MA) module, which makes full use of the channel information. Compared with the low-complexity Chase decoding based on the hard-decision decoding (HDD-LCC) and SPC_Kaneko-RS_Chase decoding, simulation results show that the SPC-RS concatenated decoding scheme based on VM_SPC-MA algorithm can provide up to 1.78 and 1.05 dB of coding gain when the bit error rate is (BER) = 10−5. Besides, the hardware design of the SPC-MA module is provided and applied to the serial LCC decoder based on syndrome calculation-polynomial selection (PS)-Chien search and Forney algorithm (SPCF). The implementation results in ASIC show that the area efficiency of the complete concatenated decoder increases by 27.38% compared to the unified syndrome computation (USC)-based LCC decoder in a 0.13- $\mu \text{m}$ process.