A process for fabricating an integrated circuit with gate self-protection, and integrated circuit with gate self-protection

An integrated circuit with gate self-protection comprises a MOS device and a bipolar device, wherein the integrated circuit further comprises a semiconductor layer (14) with electrically active zones (16) in which and is formed on which the MOS device and the bipolar device be, and electrically inactive zones (18) for mutual isolation of the electrically active zones (16) from each other. The MOS device includes a gate structure (34, 40) and a semiconductor layer contacting structure ( "body Contacting structure") (36), wherein the semiconductor layer contacting structure (36) from a (in a selected zone 30, 32 ) (via an electrically active region 16) applied to the semiconductor layer (14) base layer (26) is formed and the semiconductor layer contacting structure (36) is electrically connected to the gate structure (34, 40). The base layer (26) which forms the semiconductor layer in contact structure (36) also forms the base of the bipolar device. The present invention further relates to a method for producing such an integrated circuit.