Study of System-on-Chip devices to implement embedded real-time simulators of modular multi-level converters using high-level synthesis tools

System-on-Chip (SoC) devices combine powerful general purpose processors, a Field-Programmable Gate Array (FPGA) and other peripherals which make them very convenient for controlling and monitoring a complete system. These characteristics make them very suitable to implement Embedded Real-Time Simulators (ERTS), which provide interesting and powerful functionalities (such as observers, parameter estimation, diagnostic, health monitoring, etc.) but increasing significantly the complexity of the controller. The main drawback of these devices is that control engineers are not particularly familiarized with FPGA programming, which need extensive expertise in order to code these highly sophisticated algorithms using Hardware Description Languages (HDL). Notwithstanding, there exist High-Level Synthesis (HLS) tools which allow to program these devices using more generic programming languages such as C, C++ and SystemC. This paper evaluates SoC devices to implement several versions of a Modular Multi-Level Converter (MMC) using HLS tools. An improved simplified model of the converter which includes the modulation, the voltage balancing algorithm, and the circulating current control keeping record of every sub-module (SM) capacitor voltage. The MMC model will be evaluated changing the number of SM from 6 to 700 per phase, and using three different formats for the variables and parameters: 64-bit floating-point, 32-bit floating-point, and 32-bit fixed-point variables. The different versions of the ERTS will be compared in terms of computational power, area utilization and precision.