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High-speed gate drive scheme for three-phase inverter with twenty nanosecond minimum gate drive pulse
High-speed gate drive scheme for three-phase inverter with twenty nanosecond minimum gate drive pulse
2009
Tyster
Iskanius
Strom
Korhonen
Rauma
Saren
Silventoinen
Keywords:
Modulation
pulse
Nanosecond
Electrical engineering
Adjustable-speed drive
Logic gate
MOSFET
Frequency-shift keying
Active filter
Materials science
Correction
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