Research on a pulse-based high-line-rate TDI CMOS image sensor

Abstract In this paper, a 256-stage pulse-based time delay integration (TDI) CMOS image sensor is presented. In this sensor, a capacitive trans-impedance amplifier (CTIA) based pipeline charge transfer (PCT) pixel structure is proposed, which achieves low noise signal accumulation. A pulse generator circuit is used after the PCT-pixel to detect and generate pulse, which starts processing self-reset operations when the pulse is generated. Therefore, 1-bit output is realized for each stage of TDI signal processing circuit. The pulse signal is easier to accumulate in the digital accumulator. With a high line rate of 100 KHz, SNR improvement of the proposed sensor is 24.15 dB and the energy consumption of the sensor is 0.44 nJ/pixel.