Memory system optimization for graph processing: a survey

Containing a variety of information, a graph is a complex data structure comprising vertices and edges. Graph processing or graph computing is the abstraction of the relation and properties of graph structures in real-life situations and performing some complex computations. Owing to the bottlenecks in the performance of the central processing unit, many coprocessors and domain-specific accelerators have been designed to improve running speed and to save energy. Considering the strong data dependence of graphs, improving the efficiency of memory access is a critical issue to improve system performance. In particular, memory management and optimization have become extremely important due to the expansion of graph data scale and the acceleration of various graph processing. This study aims to propose a memory architecture and management methods in graph processing on heterogeneous architecture. We describe the graph data layout that can improve the efficiency of memory access, analyze recent work on memory optimization and features of GPU, FPGA, ASIC, PIM, among others. Furthermore, we summarize relevant research progresses in recent years in China, and conclude the opportunities and challenges of graph processing in memory.