Implementation of several RLS nonlinear adaptive algorithms using a commercial floating point digital signal processor

1993 
We examine the potential use of the new floating point DSP chips for adaptive filtering. We have implemented several nonlinear adaptive filtering algorithms based on Least Squares estimation criterion using a floating point digital signal processor. To verify stability of an algorithm prior to implementation, we emulate single-extended precision floating point hardware using a C++ class. This elegant and transparent solution indicates an algorithm's susceptibility to errors produced by finite precision arithmetic and the minimum precision necessary for stability. Our experience with the DSP chip indicates that the chip provides sufficient numerical accuracy and stability and is a viable platform for such algorithms. In addition, our implementations are quick enough for some real-time applications, particularly since several processors can be used in parallel. >
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