DFSB-Based Thermal Management Scheme for 3-D NoC-Bus Architectures

Three-dimensional network-on-chip (NoC)-bus hybrid architectures are motivated to achieve lower propagation latency and higher bandwidth in vertical direction, by taking the advantage of the short interwafer distances in 3-D integrated circuits. However, 3-D integration technology increases the power density of the chip, and thus, results in thermal-related problems. Therefore, to ensure that the chip operates within the safe temperature range, while keeping the traffic performance undegraded, this paper proposes a proactive thermal management scheme based on dynamic frequency scaling bus (DFSB) for developing thermal-aware 3-D NoC-bus architectures. The novel solution includes thermal-aware frequency scaling policy (TFSP) and frequency-aware adaptive routing (FAAR), for the temporal and spatial management separately. TFSP dynamically and proactively adjusts the frequency of DFSB, according to the predicted thermal variation, to throttle the data flow for heat dissipation. Meanwhile, FAAR cooperated with TFSP by migrating the data flow to balance the distribution of traffic and thermal, and thus, unacceptable local data congestion and latency are avoided. In order to show the effectiveness of the proposed solution, we compare it against global throttling and downward routing thermal management solutions in a $4\times 4\times 4$ 3-D NoC-bus architecture. Experimental results show that, under the thermal limitation of 378.15 K, our proposed solution outperforms the other two solutions by 24% and 56.2% improvement in throughput, and 33.1% and 45.7% reduction in latency.