Image display device and video ram chip

PURPOSE: To reduce the area of a memory chip occupied by a data register by storing data in the data register in response to the successive sequence of the data from a video source and control signals. CONSTITUTION: Whether graphic display information is transmitted to a memory by a parallel format or the successive sequence, a graphic processor 103 decides and controls where in a video RAM 105 the display information is to be stored. Thereafter, while successive read from the video RAM 105 is performed, the graphic processor 103 decides a read sequence, an address to read the data and control information requested so as to create desired graphic images on a video display 112. In this case, the data register and the group of transfer gates in a layout cover a practically smaller area than the data register and the group of the transfer gates in the layout.