A four-quadrant analog multiplier under a single power supply voltage
2012
An analog multiplier driven by a single supply voltage is proposed. Some improvements are introduced so as to get a higher performance. The proposed analog multiplier can work precisely in four quadrants with a very small THD. An added OTA keeps the linearity error of the circuit smaller than 1%. The presented multiplier is designed on the 0.6 μm BCD process and the simulation results by HSPICE shows a perfect performance. It can be used in any system that requires a high performance analog multiplier.
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