Impact of stacking layers on RTN in 3D charge trapping NAND flash memory

Abstract The word-line (WL)-position dependence of memory cell's threshold-voltage fluctuation (ΔVth) in 3D charge trapping flash (CTF) caused by random telegraph noise (RTN) was studied. Contrary to planar NAND flash, test results show that WL0 has wider accumulative distributions of ΔVth than WL63 in 3D CTF NAND. Transmission electron microscopy (TEM) results show that grain size (GS) decreases by 14.6% from top WLs to bottom WLs. As a result, grain boundary density increases from top to bottom, which corresponds to a larger ΔVth. Moreover, despite the similar transconductance (Gm) trend in planar and 3D Flash memories, WL31's RTN hardly changed with altered RS and RD in CTF memory. These experimental results indicate that Gm is not the dominant factor of RTN in 3D CTF, but the physical properties of the polycrystalline silicon (poly-Si) channel.