Sub-10-nm planar-bulk-CMOS devices using lateral junction control
2003
Sub-10-nm planar-bulk-CMOS devices were clearly demonstrated by a lateral source/drain (S/D) junction control using the precisely-controlled gate-electrode, shallow source/drain extensions (SDE) and steep halo. Good cut-off characteristics were observed for n/pMOSFETs with the gate length of 5 nm at 0.4 V for the first time.
Keywords:
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
2
References
51
Citations
NaN
KQI