Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric

Plasma-based PH 3 passivation technique is extensively studied for the surface passivation of InGaAs substrate prior to high-k deposition. The comparative analysis reveals that the striking improvement is achieved when a stable covalent-bond P x N y layer forms at the interface during plasma PH 3 -passivation. We report that P x N y passivation layer improves thermal stability of high-k/InGaAs gate stack up to 750°C, which enables successful implementation of InGaAs MOSFETs by self-aligned gate-first process. By adopting P x N y passivation on InGaAs with MOCVD HfAlO and metal gate stack, we achieved subthreshold slope of 98mV/dec, G m =378mS/mm at V d =1V, and effective mobility of 2557cm 2 /Vs at E eff =0.24MV/cm.