Cell Designer - a Comprehensive TCAD-Based Framework for DTCO of Standard Logic Cells

We present the first practical TCAD-based work flow for design-technology co-optimization (DTCO) of standard cells. The flow consists of parametric cell layout templates, layout-based structure generation, mixed-mode transient electrical device simulation, and data collection and analysis. Based on electrical and structural characterizations of the iNt4,iN10, and iN7 nodes, the models presented in this work feature a projection for 5 nm technology nodes based on FinFET, nanowire, and nanosheet. Transient five-stage ring-oscillator simulations show a clear advantage for the FinFET in terms of switching frequency and power consumption.