Memory cell capacitor using cross double patterning technology for gigabit density DRAM

In order to achieve dynamic random access memory (DRAM) with high density and high performance, abrupt scaling down of memory device is necessary. But lithography tool cannot follow up memory device scaling down. Double patterning technology (DPT) has been reported as a promising candidate to extend lithography limit [1, 2]. But DPT has a technical problem of pattern to pattern overlay [3]. To overcome overlay problems, cross double patterning technology (cross DPT) in which second pattern is perpendicular to first one is introduced. In this paper, for the first time, memory cell capacitor using cross DPT is successfully developed. Process integration and electrical characteristics of memory cell capacitor using cross DPT is presented.