A Sub-100fs JitterRMS, 20-GHz Fractional-N Analog PLL using a BAW Resonator Based 2.5GHz On-Chip Reference in 22-nm FD-SOI Process

A 20-GHz Fractional-N Analog PLL leveraging a novel high-speed charge pump is presented. A fully integrable, on-chip 2.5GHz reference, using a MEMS-BAW resonator based DCO, allows a lower division-ratio and enhances suppression of charge pump (CP), phase-frequency detector (PFD) and, loop filter (LF) noise. Capability is built into the design to characterize the PLL with either BAW or external reference. Designed and fabricated in GlobalFoundries 22-nm FD-SOI process, the class-C transformer-coupled VCO is measured to be centered at ∼19.7GHz with 16% tuning range while maintaining a flat |FOM| ∼188dBc/Hz (10MHz offset) over the tuning range. The PLL measures an excellent jitter and |FOM j | of 65/92fs and ∼249/245dB in integer/fractional modes, respectively.