Design Method and Mechanism Study of LDMOS to Conquer Stress Induced Degradation of Leakage Current and HTRB Reliability

8V NchLDMOS, which has an enough tolerance against both a leakage current (Idss) increase and high temperature reverse bias (HTRB) degradation is proposed. Dislocation growth, which results in Idss increase and has a negative influence on HTRB reliability, occurs because of a high-dose ion implantation and/or mechanical stress due to shallow trench isolation (STI). The studied 8V NchLDMOS was developed by taking into account the mechanism understanding to prevent the dislocation growth affecting the device characteristics, and as a result, achieved a competitive low resistance ( $\mathbf{RonA}=1.67\mathbf{m}\mathbf{\Omega}.\mathbf{mm}^{2}$ ).