New Method of Simulation for 8-bit RISC MCU IP Soft Core

According to the top-down design method, this paper introduces the system architecture of one 8-bit RISC MCU IP core, analyzes the technique for realization of pipeline and jump-instruction. It presents a plan of building a virtual instruction memory module for simulation of MCU IP core, and a method to initial the memory are shown, to advance simulation efficiency of MCU IP core.