Solid-state dewetting of single-crystal silicon on insulator: effect of annealing temperature and patch size

Abstract We address the solid state dewetting of ultra-thin and ultra-large patches of monocrystalline silicon on insulator. We show that the underlying instability of the thin Si film under annealing can be perfectly controlled to form monocrystalline, complex nanoarchitectures extending over several microns. These complex patterns are obtained guiding the dewetting fronts by etching ad-hoc patches prior to annealing. They can be reproduced over hundreds of repetitions extending over hundreds of microns. We discuss the effect of annealing temperature and patch size on the stability of the final result of dewetting showing that for simple patches (e.g. simple squares) the final outcome is stable and well reproducible at 720 °C and for ~ 1 μm square size. Finally, we demonstrate that introducing additional features within squared patches (e.g. a hole within a square) stabilises the dewetting dynamic providing perfectly reproducible complex nanoarchitectures of 5 μm size.