Wafer level 3D stacked technology solution for future IoT devices

An integration process feasibility of backside via technology and photosensitive polymer technology using thin film battery (TFB) as a sample was investigated for realizing future 3D heterogeneous integration. Multi-layer etching by backside via process and hole-opening to photosensitive polymer for TFB insulation / wafer bonding were tried. Half-filled Cu TSV (Through Silicon Via) and polymer hole electrode formation in stacked structure for trial without thin film battery (TFB) was confirmed by cross-section SEM observation, a certain degree of feasibility for this process was shown.