Si0.5Ge0.5 channel introduction technique for the preparation of high mobility FinFET device

Abstract In this paper, the introduction technique of high mobility Si0.5Ge0.5 channel on bulk-Si substrate and its FinFET device preparation are explored in detail. First, a vertical Si0.5Ge0.5 fin formation on a slightly tapered SiGe strain relaxed buffer (SRB) can be attained by developing an optimized two-step etching process with HBr/O2/He plasma. Moreover, a SiN liner is introduced to further improve the thermal stability of the SiGe SRB/Si0.5Ge0.5 fin during a low temperature STI densification annealing. As a result, no obvious Si0.5Ge0.5 oxidation and Ge diffusion are observed. After the SiGe SRB/Si0.5Ge0.5fin structure is successfully prepared, a Si0.5Ge0.5 channel pMOS FinFET device is fabricated. Its drive current IDS of 123 μA/μm under |VDS| = |VGS| = 0.8 V, Ion/Ioff ratio of ∼3e4 and subthreshold slope of 120 mV/dec are demonstrated. The above results show that these newly developed processes can be a practical technique for the preparation of high mobility FinFET device.