Enhancement of Adaptive Software-Based Self Test Generation of Embedded Processors Cores

Abstract The paper deals with automatic software-based test generation for processors as basic blocks of current complex systems on chip and embedded systems. Testing processors needs continually new test generation methods, algorithms and test application techniques for their verification, manufacture and infield testing and reliable life-time run. The functional tests of processors are mainly generated over an instruction set architecture and processor model description. Such types of tests are serving as additional tests to structural testing or as tests used in verification. They run in similar form and frequency as real programmes. Such tests are categorized as the software-based self tests. A metric for quality evaluation of the software-based tests is obviously provided by code coverage of a processor model. A functional test generation method is based on VHDL model of processors and genetic algorithms with using various evolutionary strategies. The contribution to the SBST methods based on GAs using the latest defined ES was identified. Functionality and effectiveness of the developed methods were evaluated in the implemented system AGenMIX with enhanced function of genetic algorithms computation over three types of RISC processor.