Low temperature processing of SiO2 thin films by HD-PECVD technique for gate dielectric applications

We report on the fabrication and characterization of SiO 2 thin films by high-density plasma enhanced chemical vapor deposition (HD-PECVD) technique at a processing temperature lower than 400°C for gate dielectric applications in thin film transistor (TFT) devices. An inductively coupled plasma source was used to couple the rf power to the top electrode. The SiO 2 thin films were fabricated on p-Si wafers using nitrogen, nitrous oxide, and silane precursors. The deposition process was optimized in terms of the effects of rf power, gas flow rates, and system pressure on deposition rate, chemical etch rate, optical properties, and electrical characteristics. The effects of the processing variables on the refractive index, Si-O bond formation, and impurity related bonds were analyzed. The electrical properties of the films were evaluated from the I-V and C-V characteristics of the MOS capacitors. The effects of the SiO 2 film thickness on the electrical characteristics of MOS capacitors were also investigated in the range of 30-100 nm. The influence of the low temperature processed gate dielectric on the performance of 500 a poly-Si TFTs was evaluated in terms of the transfer and gate leakage characteristics. The microstructural and electrical characteristics of the HD-PECVD deposited SiO 2 thin films suggest their suitability for the low temperature integration of TFTs on glass or other low temperature substrates.