A concept of a hardware design environment with the functional language elixir: work-in-progress.

The functional language Elixir is designed to be effective for the application. One of the most considerable feature of Elixir is that it is easy to realize the parallel processing with the standard library, such as Flow. In this paper, we study a design environment for hardware circuits using Elixir as a design language. We propose a synthesize flow for data flow hardware on the FPGA from the native Elixir code. Our method synthesizes functional equivalence circuits from the description of Enum and Flow in Elixir, which are libraries for direct manipulation and parallel processing of data collection in Elixir. Data flow is implemented base on the pipeline operator $\vert >$ which connects the processing relation of the function by the data processing order. To realize a hardware design environment by Elixir, this paper shares current status of our implementation.