A Low-Noise 40-GS/s Continuous-Time Bandpass $\Delta\Sigma$ ADC Centered at 2 GHz for Direct Sampling Receivers

This paper presents a 40-GS/s continuous-time bandpass DeltaSigma analog-to-digital converter centered at 2 GHz for wireless base station applications. The ADC consists of a fourth-order loop with multiple feedback and is designed entirely in the s-domain. The circuit achieves an SNDR of 55 dB and 52 dB over bandwidths of 60 MHz and 120 MHz, respectively, and an SFDR of 61dB with a single-ended IIP3 of +4 dBm. The center frequency is tunable from 1.8 to 2 GHz. It employs a G m -LC VAR filter based on a MOS-HBT cascode transconductor with an NFMIN of 2.29 dB. The entire circuit is implemented in a 130-nm SiGe BiCMOS technology with 150-GHz f T SiGe HBT and dissipates 1.6 W from a 2.5-V supply