Design of a low-noise, high-linearity, readout ASIC for CdZnTe-based gamma-ray spectrometers

Abstract The presented work is dedicated to designing a readout ASIC used in CdZnTe-based gamma-ray spectrometers for radionuclide identification. In order to achieve high linearity in a large dynamic range, an active resistor is utilized. Since the active resistor induces high noise, a CR − (RC) 2 slow shaper with two different stages is proposed to suppress the noise. The integrating resistors in the first stage are implemented by transistors operating in triode region, while the active resistor is utilized in the second stage. A prototype chip with eight channels has been designed and fabricated in a standard commercial 1P6M 0.18 μ m CMOS process. The measured nonlinear error is less than 1% with the input charge ranging from − 1 . 4 fC to − 56 fC, owning to the proposed slow shaper. Measured ENC is about 180 e − at input capacitance of 0 F with a slope of 7.7 e − /pF.