Experimental Study of 600 V Accumulationtype Lateral Double-Diffused MOSFET with Ultra-low ON-Resistance

A novel Lateral Double-Diffused MOSFET (LDMOSFET) with ultra-low resistance is investigated by experiments. The proposed LDMOSFET features an extended gate field plate consisting of two back-to-back diodes. In the ON state, the electron accumulation layer is formed below the gate field plate and greatly reduces the resistance of the drift region. In the OFF state, the field plate assists in depleting the drift region and modulates the electric field distribution of the drift region, which ensures high breakdown voltage (BV). The key fabrication process steps for the proposed device are given. The fabricated prototype device shows specific on-resistance ( ${R} _{{\text {on},\text {sp}}}$ ) of 70 $\text{m}\Omega \cdot $ cm2 and BV of 680 V, which is superior performance for reported 600 V-rated lateral devices. The ${R} _{{\text {on},\text {sp}}}$ of the proposed LDMOSFET is decreased by 50% compared with the LDMOSFET without accumulation effect.