First Demonstration of WSe2 CMOS Inverter with Modulable Noise Margin by Electrostatic Doping

Transition metal dichalcogenides (TMDs) as a family of 2D materials have received considerable attention due to their outstanding physical properties. Semiconducting TMDs with sizable bandgaps are especially appealing in quest of potential silicon alternatives. A complementary metal oxide semiconductor (CMOS) based inverter consisting of a p-type and an n-type field effect transistor (FET) is a fundamental unit for the logic elements of a circuit. WSe 2 FETs provide us a platform to achieve CMOS without intentional chemical doping due to the availability of both electron and hole transport. Here we demonstrate for the first time a WSe 2 CMOS inverter with modulable noise margin (NM), full logic swing, and high voltage gain by a novel gating scheme. Compared to existing demonstrations of WSe 2 -based inverters [1]–[4] utilizing Schottky-barrier type devices, we deliver a genuine CMOS with n/i/n and p/i/p electrostatic doping profiles for the n/p-FET, respectively. Furthermore, We explore the significance of having devices with matched threshold voltages (V th ) to achieve optimal NM for high and low input states ( $\mathrm{NM}_{\mathrm{H}}$ and $\mathrm{NM}_{\mathrm{L}}$ ), which is essential to realize advanced circuit implementations.