A Robust 24mW 60GHz Receiver in 90nm Standard CMOS

2008 
In this paper, a highly integrated receiver front-end is demonstrated that is manufactured in a digital CMOS process using a design approach amenable to mass production. Unlike many previous attempts in CMOS, the results of the design are well predicted by the simulation results, matching the desired frequency band and the simulated gain to a very high accuracy. Low noise and high gain are demonstrated with low power consumption. The chip is fabricated in a 90 nm digital CMOS process and tested using on-chip probes.
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