The Analysis of -I-V characteristics on n-channel offset gated poly-Si TFT's

The I-V characteristics of the n-channel offset gated poly-Si TFT’s have been analyzed as a function of offset length. It has been found that the offset regions behave as a series resistance and reduce lateral electric field in the drain depletion region. The on current slightly decreased by the series resistance of the offset region. The off current remarkably reduced from to ~ A at = 5 V and = -20 V and almost constant independent of gate and drain voltage sue to the reduction of the electric field in the drain depletion region. The on/off current ratio of the offset gated TFT’s is larger than that of a conventional devices and it becomes larger as the drain voltage increased.