A comparative study of strain and Ge content in Si 1−x Ge x channel using planar FETs, FinFETs, and strained relaxed buffer layer FinFETs

Strained Si 1−x Ge x channel pFinFETs and planar pFETs are fabricated on a strain relaxed buffer virtual substrate to comparatively study the electrical impact of strain and Ge content in the Si 1−x Ge x channel. By comparing the transistor electrical properties of Si 1−x Ge x pFETs on SRB with Si 1−x Ge x pFETs on Si substrate, we successfully decouple the influence of strain and Ge content in the Si 1−x Ge x channel on device performance such as gate stack quality, reliability, and carrier transport. Based on these understandings, dual channel Si/Si 1−x Ge x FinFETs on the SRB with the optimized surface orientation is proposed to further improve the device performance.