Design of a low-voltage and low-power CMOS Folded Cascode Operational Amplifier

A high-performance low-voltage and low-power CMOS Folded Cascode Operational Amplifier is designed in this paper. Folded Cascode construction for the input stage is adopted. In this construction ICMR can be optimized and gain can be improved; The output stage is biased in class AB. The whole circuit is simulated with BSIM3V3 Spice model in Hspice based on TSMC 0.18um. HSPICE simulation shows that this structure has a significantly lower power consumption , compared to the traditional architectures , while maintaining almost the same gain , bandwidth and other key performances. At present, this amplifier has already been applied to 14bits ∑-△A/D.