MeXT-SE: A Design Tool to Transparently Generate Secure MPSoC
2020
Hardware accelerators are increasingly employed in conjunction with general-purpose processors to meet stringent performance constraints. In these heterogeneous systems, security has become a prime concern. In this article, we present a design approach to generate platform-independent secure multiprocessor systems-on-chip (MPSoC) from a high-level abstraction. The aim of this article is to simplify the implementation of MPSoC, while ensuring security. The proposed design flow starts with a set of abstract and concrete specifications of a system, provided by the user, and ends up generating a generic description of the appropriate hardware design by setting up the communication structure of different components. The resulting abstract architecture is further processed using the vendor tool-chain to generate the target platform’s configuration. To enforce security, we proposed a distributed isolation framework for multilevel security, resource assess control including access to and from hardware accelerators. From a user specification, the security layer is transparently generated and security rules and requirements transparently enforced at run-time. Experimentation results show that our proposed tool can generate MPSoC designs capable of providing secure hardware execution with negligible execution overhead.
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