Reliability Testing of FCCSP Packages for Automotive Applications

Autonomous driving and car to car or car to infrastructure communication applications are pursuing and demand for a detailed understanding of the reliability of electronics. This work focuses on reliability analysis of flip-chip chip scale packages (FCCSP) for such as automotive electronics applications. Reliability investigation is accomplished by means of temperature cycling on board level (TCoB) since it is strongly recommended to apply such tests during the package development phase. Tests have been done on FCCSP components. The board level interconnects are solder joints with a BGA pitch of 0.4 mm. The packages have been assembled to custom test boards using SnAgCu solder alloy. Temperature cycling was done at -40/125 °C according to the AEC-Q100 standard. Test board development was done to enable harsh test conditions and to cover advanced use requirements, e.g. by selecting a high-T g material. The entire test setup enables in-situ monitoring of resistance and leakage currents. The tested packages have been manufactured using a flip-chip CSP assembly technology and Cu-pillar first level interconnects. As electronics qualification procedures require passing at least 500 TC cycles but the AEC even ask to pass 1,000 cycles, the aim of this study was to investigate the health of the first and second level interconnects of the FCCSP package after an intermediate cycle count of 750. The stress which the second level interconnects are exposed to was accelerated. Therefore, the board design considered SMD defined pads with a rather small pad diameter. In addition, consecutive electrical read-outs were used to prove if an offline monitoring of selected I/Os can be used to track the overall specimen health throughout the experiment. Analyses of the samples are in progress including extensive cross sectioning. Though no damages were seen at the BEoL structures nor first level interconnects, severe damage of the second level interconnects is proven and certainly caused by the specific board pad design. In addition, board design features such as trace routing seem to have an influence on the second level solder joint reliability as well. However, based on the accomplished number of TCoB cycles and analysis results a high package level robustness of the FCCSP can be concluded and proposals for the board design can be derived.