An Improved LVTSCR Device with an Embedded BJT for ESD Protection

The traditional low-voltage-trigger silicon-controlled rectifier (LVTSCR) has relatively low holding voltage, hence it has the risk of latch-up for the operating voltage of no less than 3.3V. In this paper, a novel LVTSCR structure with an embedded BJT (BJT-LVTSCR) is proposed to introduce a shunt path which reduces the current flowing through the SCR path and thereby increases the holding voltage. The proposed device is designed in a 0.18-µm CMOS process. The physical mechanism and operating principle of the BJT-LVTSCR are discussed. The transmission line pulsing (TLP) simulation method is used to mimic Human Body Model (HBM) event by using Sentaurus-Tcad tool. The results demonstrate that the proposed BJT-LVTSCR not only satisfies the operating voltage of 3.3V and eliminates the risk of latch-up, but also shows good ESD robustness. Moreover, the proposed device does not increase the process complexity and layout area.