Highly-Efficient Fully-integrated Multi-Voltage-Domain Power Management with Enhanced PSR and Low Cross Regulation

Multi-voltage domains are urgently needed in modern SoCs, while existing solutions such as switched DC-DC converter, switched capacitor converter and low-dropout regulator (LDO) do not generate multi-voltage domains conveniently and inexpensively. This paper presents a highly-efficient fully-integrated power management strategy to provide the multiple voltage domains. The proposed architecture stacks a main LDO (MLDO) and several auxiliary push-pull regulators (APPRs) to generate multiple voltages for various loads in one SoC chip. The APPR regulates the load current by either absorbing or providing the additional current, which stabilizes the output voltages, increases the power supply rejection (PSR) and decreases the cross regulation (CR). A prototype with two output terminals is implemented with a standard 0.18-m CMOS technology. The whole system achieves high power efficiency of 96.5% and high PSR of - 62 dB and - 142 dB for upper and lower outputs, respectively. The chip area is 980 m 500 m and the total quiescent current is 239 A. In addition, all off-chip components are eliminated, which is favorable for monolithic realization. The reduced system cost and the reduced electromagnetic interference (EMI) also simplify the power management significantly, which helps to enable low-power and compact SoCs.