Old Web
English
Sign In
Acemap
>
Paper
>
Modeling of resistance in FinFET local interconnect
Modeling of resistance in FinFET local interconnect
2014
Ning Lu
Pooja M. Kotecha
Richard A. Wachnik
Keywords:
Integrated circuit layout
Electronic engineering
Interconnection
Engineering
Electrical engineering
Correction
Source
Cite
Save
Machine Reading By IdeaReader
8
References
5
Citations
NaN
KQI
[]