Thermal Noise Models for Trigate Junctionless Transistors Including Substrate Bias Effects

Thermal noise power spectral density (PSD) models for trigate junctionless field-effect transistors (TG-JLFETs) incorporating substrate bias effects are developed in this article. The PSDs of drain current thermal noise, induced gate noise, and cross correlation between the two noises are derived for TG-JLFET using the modified Klaassen and Prins (KP) equation. An all-region drain current model of TG-JLFET is used to obtain the aforementioned thermal noises. Thermal noise PSD in TG-JLFET depends on channel conductance, and substrate bias voltage significantly modulates the channel conductance, and thus, the substantial impact of substrate bias can be observed on thermal noise of TG-JLFET. Model results are validated with the simulation results obtained using a 3-D technology computer-aided design (TCAD)-based device simulator from Synopsys.