MANUFACTURING METHODS FOR CRYOELECTRIC MEMORIES.

Abstract : The objective of this contract is the optimization of the cryoelectric memory cell design, the plane fabrication process, and the extrapolation of a large-capacity memory system based on the performance data and technology developed. Arrays (64 cells each) of the structured loop cell were fabricated, evaluated, and then modified to optimize performance. High-density (6,500 cells/sq in) planes of the final optimized design, Loop Cell Type C, demonstrated adequate sense amplitude, good signal-to-noise ratio, cell-to-cell isolation, and good operating tolerance at low operating current levels. The photoetch fabrication process was continuously refined, yields were improved, controls instituted, and a manufacturing process sequence projected. An analysis of large-capacity memory system requirements was made which resulted in the design of a hybrid (word-bit) organized system. It offers low electronics costs and heat load, potential plane yield improvement through redundancy, and an adaptability to very large memory systems. Construction of hybrid system (10,000 bits) is under way. The conclusion is that high-capacity cryoelectric memories are feasible and promise low user cost. Further development of production-type planes and interrelated systems is recommended. (Author)