Design of a Low Power, Inductorless Wideband Variable-Gain Amplifier for High-Speed Receiver Systems

This paper presents the design and analysis of a wideband inductorless variable-gain amplifier (VGA) for high-speed communication receiver systems. The proposed methodology of using a dual-feedback network for bandwidth extension and dc offset cancellation is analyzed theoretically. The proof of concept is verified by a measured stand-alone VGA chip and it achieves several record performances compared to the existing publications up to date. The chip achieves a 2.2 GHz 3-dB bandwidth with wide tuning range from -10 dB up to 50 dB. Moreover, it consumes only 2.5 mW through a 1 V supply and occupies 0.01 mm 2 active area in a standard 90 nm CMOS technology.