Development of CMOS Active Pixel Image Sensors for Low Cost Commercial Applications

The Jet Propulsion Laboratory, under sponsorship from the NASA Office of Advanced Concepts and Technology, has been developing a second-generation solid-state image sensor technology. Charge-coupled devices (CCDs) are a well-established first generation image sensor technology. For both commercial and NASA applications, CCDs have numerous short comings. In response, the active pixel sensor (APS) technology has been under research. The major advantages of APS technology are the ability to integrate on-chip timing, control, signal-processing and analog-to-digital converter functions, reduced sensitivity to radiation effects, low power operation, and random access readout. JPL has been exploring a complementary metal-oxide-semiconductor (CMOS) APS technology. CMOS is a widely used microelectronics technology for microprocessors, memory devices and application specific integrated circuits (ASICs). Use of CMOS for image sensors can reduce fabrication costs by over a factor of three compared to CCD image sensors. Thus, the JPL-developed technology has widespread appeal for low cost commercial applications such as video phones, computer input devices, surveillance and robotics. The JPL CMOS APS technology is being successfully transferred to industry. The sensors feature TTL-compatible operation (5 volts or less), random accessibility, 75 dB dynamic range, fixed pattern noise less than 0.1 %, read noise in the 15-25 electron r.m.s. range, and low power. This paper will discuss the development of CMOS APS technology, its performance characteristics, and its application to low cost commercial products.