128 x 128 CMOS photodiode-type active pixel sensor with on-chip timing, control, and signal chain electronics

A 128 X 128 element CMOS active pixel image sensor (APS) with on-chip timing, control, and signal chain electronics has been designed, fabricated and tested. The chip is implemented in 1.2 micrometers n-well process with a 19.2 micrometers pixel pitch. The sensor uses a photodiode-type CMOS APS pixel with in-pixel source follower, row selection and reset transistors. The sensor operates from a +5 V supply and requires only a clock signal to produce video output. The chip performs correlated double sampling (CDS) to suppress pixel fixed pattern noise, and double delta sampling (DDS) to suppress column fixed pattern noise. The on-chip control circuitry allows asynchronous control of an inter frame delay to adjust pixel integration. On-chip control is also provided to select the readout of any size window of interest.