Power-Efficient Heterogeneous Many-Core Design with NCFET Technology

Multi-/many-core, homogeneous or heterogeneous architectures, using the existing CMOS technology are inevitably approaching the limit of attainable power-efficiency due to the fundamental limits in scaling. Negative Capacitance Field-Effect Transistor (NCFET) is an alternative technology that promises multi-fold increase in the power-efficiency. NCFET incorporates ferroelectric layer within the transistor's gate, which exhibits negative capacitance effect amplifying the internal voltage. NCFET has been in detail studied in both physics and devices/circuits communities where its superiority has been demonstrated in semiconductor measurements. However, the full promise remains unmodeled and unquantified at microarchitecture and system levels. This work, explores system- and application-level benefits of NCFET-based multi-/many-core designs in terms of performance and power-efficiency compared to state-of-the-art FinFET-based designs. This exploration is done first through analytical modeling in which we extend Amdahl's law for NCFET multi-/many-cores, and then through quantitative modeling. The latter is achieved through RTL- and system-level simulations of NCFET-based multi-cores. The analytical modeling shows that novel type of technology-based heterogeneity in which cores with the same microarchitecture but different FE thicknesses is highly beneficial. Such novel heterogeneity increases the power-efficiency by up to 3.5X over homogeneous systems and achieves 8.3% better performance and 20% higher power-efficiency than conventional heterogeneity in the microarchitecture.